#
# Configuration info for Agere Vx115 CPU support
#

file	arch/arm/arm32/irq_dispatch.S

# standard memory-mapped bus ops
file	arch/arm/vx115/vx115_io.c		

# vx115 onchip buses: have ahb, apb
# vx115 ahb
device	vx115_ahb { [addr=-1], [size=0], [intr=-1], [index=0] }: bus_space_generic
attach  vx115_ahb at mainbus
file	arch/arm/vx115/vx115_ahb.c		

# vx115 apb
device	vx115_apb { [addr=-1], [size=0], [intr=-1], [index=0] }: bus_space_generic
attach  vx115_apb at mainbus
file	arch/arm/vx115/vx115_apb.c


# clock device
device	vx115_clk 
attach	vx115_clk at vx115_apb
file	arch/arm/vx115/vx115_clk.c


# interrupt controller
device	vx115_pic 
attach	vx115_pic at vx115_apb
file	arch/arm/vx115/vx115_intr.c


# vx115 serial device
device	vx115_com: tty
attach	vx115_com at vx115_apb
file	arch/arm/vx115/vx115_com.c